An explanation about FSK Modulation and Demodulation.
In this video, Gregory explains the full topology of an FSK demodulator, showing how the bitstream is recovered, how time is synchronized and frequencies offset are compensated.
FSK modulation encodes the data in shifts of frequency. In the case of binary signaling, two different frequencies are used, representing 0 and 1.
The process of demodulation is done using two NCOs - Numeric Controlled Oscillators - and average filters, actually implementing a sample-by-sample DFT in real-time.
The energies at the two different frequencies are compared to determine if the data bit is a 1 or a 0.
The continuous recovered bitstream is sampled with a NCO running at the baudrate and a Gardner Time Error Detector in conjunction with a PI controller corrects the sampling interval/point.
Frequency offset are compensated using a slow time-constant servo-loop that equalize average energy of the sampled points.
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A related video about Clock Recovery PLL:
https://youtu.be/HcYFFlsSLrg
Learn how a Costas Loop demodulator works for PSK modulations:
https://youtu.be/Zwj63BWtRok
Article about how DFT works:
https://gusbertianalog.com/understanding-the-fourier-series-a-statistical-point-of-view/
00:18 - Introduction
03:36 - Overall demodulator topology
06:15 - Detecting energy without filter (DFT)
10:38 - Quadrature detection topology
13:24 - Time Recovery/Synchronization
16:55 - Offset compensation/Carrier Recovery
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