Welcome to the third video in my multi-part series on the Famicom. In this video, we'll take continue our exploration of the CPU and mainboard by talking about how the Famicom and NES uses the memory map to communicate with other chips.
Links Referenced in this Video:
- NESdev Wiki CPU Memory Map - https://www.nesdev.org/wiki/CPU_memory_map
- NESdev Wiki 2A03 Register Map - https://www.nesdev.org/wiki/2A03
Past Episodes:
- Episode 1: The Design of a Legend - https://youtu.be/VFAvBfXAKYU
- Episode 2: The 6502 CPU - https://youtu.be/Ko6rGjNx2Ow
Correction:
3:39 I was wrong here - it’s the width of the chip’s *internal* data bus that determines the chip’s “bitness”, not it’s data pins