Presented at DVCon U.S. 2021
The 3D integration using through-silicon via (TSV) is becoming a favourable option for improving performance and density instead of conventional device scaling and multi-die packaging. By stacking chips with the TSV connections, large bandwidth and reduction in interconnect length can be achieved, translating to reduction of power consumption as well as parasitic resistance and capacitance. The difference between a quad die package and 3DS TSV can be visualized from Fig. 1. The TSV memory market has seen a variety of devices being released, with DDR4 3DS being one of the promising alternatives.
By:
Aditya S Kumar, Gowdra Bomman Chethan, Shivani Maurya, Kumar Rajeev Ranjan, Anil Deshpande, Somasunder Kattepura Sreenath, Samsung Semiconductor India R&D Center
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